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| 1 | +/* |
| 2 | + * File: serialio.h |
| 3 | + * Author: asmblur |
| 4 | + * |
| 5 | + * Created on February 10, 2009, 1:13 AM |
| 6 | + * Reversed on September 2, 2019 |
| 7 | + */ |
| 8 | + |
| 9 | +#ifndef _SERIALIO_H |
| 10 | +#define _SERIALIO_H |
| 11 | + |
| 12 | +#ifdef __cplusplus |
| 13 | +extern "C" { |
| 14 | +#endif |
| 15 | + |
| 16 | +/* |
| 17 | + * Definitions: |
| 18 | + * |
| 19 | + * DTE(Data Terminal Equiptment): a PC/PS/etc(Not a modem) |
| 20 | + * DCE(Data Communications Equiptment): a modem |
| 21 | + * |
| 22 | + * RTS-CTS flow control: |
| 23 | + * RTS/RTR: Request To Send/Ready To Receive, assert to indicate readiness to receive data |
| 24 | + * CTS: Clear To Send, input from RTR of other. |
| 25 | + * |
| 26 | + * DTR: Data Terminal Ready, assert to indicate readiness to communicate |
| 27 | + * DSR: Data Set Ready, input from DTR of other |
| 28 | + * |
| 29 | + * |
| 30 | + * |
| 31 | + * |
| 32 | + */ |
| 33 | + |
| 34 | +// bits for STATUS |
| 35 | +// SIO Interrupt Pending |
| 36 | +#define SIO_STAT_IRQ 0x0200 |
| 37 | +#define SIO_STAT_CTS 0x0100 |
| 38 | +#define SIO_STAT_DSR 0x0080 |
| 39 | +#define SIO_STAT_SYNC_DET 0x0040 |
| 40 | +#define SIO_STAT_FRAME_ERR 0x0020 |
| 41 | +#define SIO_STAT_RX_OVRN_ERR 0x0010 |
| 42 | +#define SIO_STAT_PARITY_ERR 0x0008 |
| 43 | +#define SIO_STAT_TX_EMPTY 0x0004 |
| 44 | +#define SIO_STAT_RX_RDY 0x0002 |
| 45 | +#define SIO_STAT_TX_RDY 0x0001 |
| 46 | +#define SIO_STAT_MASK (0x03FF) |
| 47 | + |
| 48 | +// bits for CONTROL |
| 49 | + |
| 50 | +// enable DSR interrupts. |
| 51 | +#define SIO_CTRL_DSRI_EN 0x1000 |
| 52 | +// enable RXD interrupts. |
| 53 | +#define SIO_CTRL_RXI_EN 0x0800 |
| 54 | +// enable TXD interrupts. |
| 55 | +#define SIO_CTRL_TXI_EN 0x0400 |
| 56 | +#define SIO_CTRL_BUF8 0x0300 |
| 57 | +#define SIO_CTRL_BUF4 0x0200 |
| 58 | +#define SIO_CTRL_BUF2 0x0100 |
| 59 | +#define SIO_CTRL_BUF1 0x0000 |
| 60 | +// why is there nothing for bit 7? CTRL_BUFx is bits 9-10 |
| 61 | +#define SIO_CTRL_RESET_INT 0x0040 |
| 62 | +// enable RTS driver(inverted) |
| 63 | +#define SIO_CTRL_RTS_EN 0x0020 |
| 64 | +#define SIO_CTRL_RTR_EN 0x0020 |
| 65 | +#define SIO_CTRL_RESET_ERR 0x0010 |
| 66 | +#define SIO_CTRL_BRK 0x0008 |
| 67 | +// enable RXD |
| 68 | +#define SIO_CTRL_RX_EN 0x0004 |
| 69 | +// enable DTR driver(inverted) |
| 70 | +#define SIO_CTRL_DTR_EN 0x0002 |
| 71 | +// enable TXD |
| 72 | +#define SIO_CTRL_TX_EN 0x0001 |
| 73 | +#define SIO_CTRL_MASK (0x1FFF) |
| 74 | + |
| 75 | +/* |
| 76 | + * SIO1 |
| 77 | + * Pins go from left to right |
| 78 | + * |
| 79 | + * NOTE: All pins except for RXD, TXD, GND and 3V3 are inverted. |
| 80 | + * |
| 81 | + * Pin Name Dir Notes |
| 82 | + * ----- ----- --- ---------- |
| 83 | + * 1 RXD I Receive Data |
| 84 | + * 2 3V3 3.3V output |
| 85 | + * 3 DSR I Data Set Ready |
| 86 | + * 4 TXD O Transmit Data |
| 87 | + * 5 CTS O Clear To Send |
| 88 | + * 6 DTR I Data Terminal Ready |
| 89 | + * 7 GND Ground |
| 90 | + * 8 RTS O Request To Send |
| 91 | + */ |
| 92 | + |
| 93 | +// Bits for MODE |
| 94 | + |
| 95 | +// MODE: Stop Bits |
| 96 | +// bits 6-7 |
| 97 | +#define SIO_MODE_SB_1 0x0040 |
| 98 | +#define SIO_MODE_SB_1_5 0x0080 |
| 99 | +#define SIO_MODE_SB_2 0x00C0 |
| 100 | + |
| 101 | +// MODE: Parity |
| 102 | +// bits 4-5 |
| 103 | +#define SIO_MODE_P_NONE 0x0000 |
| 104 | +#define SIO_MODE_P_ODD 0x0010 |
| 105 | +#define SIO_MODE_P_EVEN 0x0030 |
| 106 | + |
| 107 | +// MODE: Character Length(Bits Per Character) |
| 108 | +// bits 2-3 |
| 109 | +#define SIO_MODE_CHLEN_5 0x0000 |
| 110 | +#define SIO_MODE_CHLEN_6 0x0004 |
| 111 | +#define SIO_MODE_CHLEN_7 0x0008 |
| 112 | +#define SIO_MODE_CHLEN_8 0x000C |
| 113 | + |
| 114 | +// MODE: Baud Rate multiplier(??) |
| 115 | +// NOTE: supposedly these 2 bits should always be "10"(2).. |
| 116 | +// bits 0-1 |
| 117 | +#define SIO_MODE_BR_1 0x0001 |
| 118 | +#define SIO_MODE_BR_16 0x0002 |
| 119 | +#define SIO_MODE_BR_64 0x0003 |
| 120 | + |
| 121 | +#define SIO_MODE_MASK 0x00FF |
| 122 | + |
| 123 | +#define R_PS1_SIO1_DATA ((volatile uint8_t *) 0x1050) |
| 124 | +#define R_PS1_SIO1_STAT ((volatile uint16_t *) 0x1054) |
| 125 | +#define R_PS1_SIO1_MODE ((volatile uint16_t *) 0x1058) |
| 126 | +#define R_PS1_SIO1_CTRL ((volatile uint16_t *) 0x105A) |
| 127 | +#define R_PS1_SIO1_BAUD ((volatile uint16_t *) 0x105E) |
| 128 | + |
| 129 | +/* prototypes */ |
| 130 | + |
| 131 | +#ifdef __cplusplus |
| 132 | +} |
| 133 | +#endif |
| 134 | + |
| 135 | +#endif /* _SERIALIO_H */ |
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