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Added tinyload files.
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src/mips/tinyload/include/exec.h

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/*
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# _____ ___ __ ___ ____
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# ____| | | | | |____|
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# | ___| ___| ___| ____| | \
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#-----------------------------------------------------------------------
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#
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# "exec.h" for PS1.
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#
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*/
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#ifndef _EXEC_H
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#define _EXEC_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Executable file types returned by LoadEx() */
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enum { ExecTypeUNK = 0, ExecTypePSX = 1, ExecTypeSCE = 2, ExecTypeECO = 3, ExecTypeCPE = 4 };
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// sizeof() == 0x3C(60)
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typedef struct st_ExecInfo {
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uint32_t entry; // 0x00 : Address of program entry-point.
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uint32_t init_gp; // 0x04 : SCE only. Initial value the "gp" register is set to. 0 for PS-X EXE.
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uint32_t text_addr; // 0x08 : Memory address to which the .text section is loaded.
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uint32_t text_size; // 0x0C : Size of the .text section in the file and memory.
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uint32_t data_addr; // 0x10 : SCE only. Memory address to which the .data section is loaded. 0 for PS-X EXE.
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uint32_t data_size; // 0x14 : SCE only. Size of the .data section in the file and memory. 0 for PS-X EXE.
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uint32_t bss_addr; // 0x18 : Memory address of the .bss section. .bss is initialized by Exec().
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uint32_t bss_size; // 0x1C : Size of the .bss section in memory.
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uint32_t stack_addr; // 0x20 : Memory address pointing to the bottom(lowest address) of the stack. BIOS replaces
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// with "STACK" parameter of "SYSTEM.CNF" file.
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uint32_t stack_size; // 0x24 : Size of the stack. Can be 0.
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uint32_t saved_sp; // 0x28 : Used by BIOS Exec() function to preserve the "sp" register.
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uint32_t saved_fp; // 0x2C : Used by BIOS Exec() function to preserve the "fp" register.
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uint32_t saved_gp; // 0x30 : Used by BIOS Exec() function to preserve the "gp" register.
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uint32_t saved_ra; // 0x34 : Used by BIOS Exec() function to preserve the "ra" register.
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uint32_t saved_s0; // 0x38 : Used by BIOS Exec() function to preserve the "s0" register.
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} ExecInfo;
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// sizeof() == 0x88(136)
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typedef struct st_EXE_Header {
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uint8_t magic[8]; // 0x00-0x07 : "PS-X EXE"(retail) or "SCE EXE"(???)
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uint32_t text_off; // 0x08 : SCE only. Offset of the start of the .text section in the file. 0 for PS-X EXE.
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uint32_t data_off; // 0x0C : SCE only. Offset of the start of the .text section in the file. 0 for PS-X EXE.
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struct st_ExecInfo exec; // 0x10-0x4B
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char license[60]; // 0x4C-0x87
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uint8_t __pad[1912]; // 0x88-0x7FF
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} EXE_Header;
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int Exec2(ExecInfo* exec, uint32_t stack_addr, uint32_t stack_size);
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#ifdef __cplusplus
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}
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#endif
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#endif /* _EXEC_H */

src/mips/tinyload/include/serialio.h

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/*
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* File: serialio.h
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* Author: asmblur
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*
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* Created on February 10, 2009, 1:13 AM
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* Reversed on September 2, 2019
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*/
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#ifndef _SERIALIO_H
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#define _SERIALIO_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/*
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* Definitions:
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*
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* DTE(Data Terminal Equiptment): a PC/PS/etc(Not a modem)
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* DCE(Data Communications Equiptment): a modem
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*
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* RTS-CTS flow control:
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* RTS/RTR: Request To Send/Ready To Receive, assert to indicate readiness to receive data
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* CTS: Clear To Send, input from RTR of other.
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*
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* DTR: Data Terminal Ready, assert to indicate readiness to communicate
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* DSR: Data Set Ready, input from DTR of other
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*
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*
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*
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*
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*/
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// bits for STATUS
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// SIO Interrupt Pending
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#define SIO_STAT_IRQ 0x0200
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#define SIO_STAT_CTS 0x0100
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#define SIO_STAT_DSR 0x0080
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#define SIO_STAT_SYNC_DET 0x0040
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#define SIO_STAT_FRAME_ERR 0x0020
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#define SIO_STAT_RX_OVRN_ERR 0x0010
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#define SIO_STAT_PARITY_ERR 0x0008
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#define SIO_STAT_TX_EMPTY 0x0004
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#define SIO_STAT_RX_RDY 0x0002
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#define SIO_STAT_TX_RDY 0x0001
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#define SIO_STAT_MASK (0x03FF)
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// bits for CONTROL
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// enable DSR interrupts.
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#define SIO_CTRL_DSRI_EN 0x1000
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// enable RXD interrupts.
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#define SIO_CTRL_RXI_EN 0x0800
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// enable TXD interrupts.
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#define SIO_CTRL_TXI_EN 0x0400
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#define SIO_CTRL_BUF8 0x0300
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#define SIO_CTRL_BUF4 0x0200
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#define SIO_CTRL_BUF2 0x0100
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#define SIO_CTRL_BUF1 0x0000
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// why is there nothing for bit 7? CTRL_BUFx is bits 9-10
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#define SIO_CTRL_RESET_INT 0x0040
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// enable RTS driver(inverted)
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#define SIO_CTRL_RTS_EN 0x0020
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#define SIO_CTRL_RTR_EN 0x0020
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#define SIO_CTRL_RESET_ERR 0x0010
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#define SIO_CTRL_BRK 0x0008
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// enable RXD
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#define SIO_CTRL_RX_EN 0x0004
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// enable DTR driver(inverted)
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#define SIO_CTRL_DTR_EN 0x0002
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// enable TXD
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#define SIO_CTRL_TX_EN 0x0001
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#define SIO_CTRL_MASK (0x1FFF)
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/*
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* SIO1
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* Pins go from left to right
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*
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* NOTE: All pins except for RXD, TXD, GND and 3V3 are inverted.
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*
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* Pin Name Dir Notes
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* ----- ----- --- ----------
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* 1 RXD I Receive Data
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* 2 3V3 3.3V output
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* 3 DSR I Data Set Ready
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* 4 TXD O Transmit Data
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* 5 CTS O Clear To Send
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* 6 DTR I Data Terminal Ready
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* 7 GND Ground
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* 8 RTS O Request To Send
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*/
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// Bits for MODE
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// MODE: Stop Bits
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// bits 6-7
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#define SIO_MODE_SB_1 0x0040
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#define SIO_MODE_SB_1_5 0x0080
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#define SIO_MODE_SB_2 0x00C0
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// MODE: Parity
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// bits 4-5
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#define SIO_MODE_P_NONE 0x0000
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#define SIO_MODE_P_ODD 0x0010
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#define SIO_MODE_P_EVEN 0x0030
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// MODE: Character Length(Bits Per Character)
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// bits 2-3
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#define SIO_MODE_CHLEN_5 0x0000
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#define SIO_MODE_CHLEN_6 0x0004
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#define SIO_MODE_CHLEN_7 0x0008
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#define SIO_MODE_CHLEN_8 0x000C
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// MODE: Baud Rate multiplier(??)
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// NOTE: supposedly these 2 bits should always be "10"(2)..
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// bits 0-1
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#define SIO_MODE_BR_1 0x0001
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#define SIO_MODE_BR_16 0x0002
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#define SIO_MODE_BR_64 0x0003
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#define SIO_MODE_MASK 0x00FF
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#define R_PS1_SIO1_DATA ((volatile uint8_t *) 0x1050)
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#define R_PS1_SIO1_STAT ((volatile uint16_t *) 0x1054)
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#define R_PS1_SIO1_MODE ((volatile uint16_t *) 0x1058)
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#define R_PS1_SIO1_CTRL ((volatile uint16_t *) 0x105A)
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#define R_PS1_SIO1_BAUD ((volatile uint16_t *) 0x105E)
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/* prototypes */
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#ifdef __cplusplus
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}
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#endif
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#endif /* _SERIALIO_H */

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